###############################################################################
#
# IAR ELF Linker V8.40.1.212/W32 for ARM                  09/Nov/2019  08:44:51
# Copyright 2007-2019 IAR Systems AB.
#
#    Output file  =  Example_S32K_GPIO_IAR.out
#    Map file     =
#        C:/Users/wjandcf/workspaceS32DS.ARM.2018.R1/Example_S32K_GPIO_IAR/Debug/Example_S32K_GPIO_IAR.map
#    Command line =
#        Sources\boot_api.o
#        SDK\platform\drivers\src\clock\S32K1xx\clock_S32K1xx.o
#        Generated_Code\clockMan1.o Generated_Code\Cpu.o
#        Generated_Code\dmaController1.o
#        SDK\platform\drivers\src\edma\edma_driver.o
#        SDK\platform\drivers\src\edma\edma_hw_access.o
#        SDK\platform\drivers\src\edma\edma_irq.o
#        SDK\platform\drivers\src\interrupt\interrupt_manager.o
#        Generated_Code\lpuart1.o
#        SDK\platform\drivers\src\lpuart\lpuart_driver.o
#        SDK\platform\drivers\src\lpuart\lpuart_hw_access.o
#        SDK\platform\drivers\src\lpuart\lpuart_irq.o Sources\main.o
#        SDK\rtos\osif\osif_baremetal.o Generated_Code\pin_mux.o
#        SDK\platform\drivers\src\pins\pins_driver.o
#        SDK\platform\drivers\src\pins\pins_port_hw_access.o
#        SDK\platform\drivers\src\power\power_manager.o
#        SDK\platform\drivers\src\power\S32K1xx\power_manager_S32K1xx.o
#        SDK\platform\drivers\src\power\S32K1xx\power_smc_hw_access.o
#        Generated_Code\pwrMan1.o SDK\platform\devices\startup.o
#        Project_Settings\Startup_Code\startup_S32K144.o
#        SDK\platform\devices\S32K144\startup\system_S32K144.o -o
#        Example_S32K_GPIO_IAR.out --config
#        C:/Users/wjandcf/workspaceS32DS.ARM.2018.R1/Example_S32K_GPIO_IAR/Project_Settings/Linker_Files/S32K144_64_flash.icf
#        --no_wrap_diagnostics --entry Reset_Handler --map
#        C:/Users/wjandcf/workspaceS32DS.ARM.2018.R1/Example_S32K_GPIO_IAR/Debug/Example_S32K_GPIO_IAR.map
#        --text_out locale --no_bom
#
###############################################################################

*******************************************************************************
*** RUNTIME MODEL ATTRIBUTES
***

__SystemLibrary = DLib
__dlib_version  = 6


*******************************************************************************
*** HEAP SELECTION
***

The basic heap was selected because no calls to memory allocation
functions were found in the application outside of system library
functions, and there are calls to deallocation functions in the
application.


*******************************************************************************
*** PLACEMENT SUMMARY
***

"A0":  place at address 0x4'0000 { ro section .intvec };
"P1":  place in [from 0x4'0400 to 0x4'040f] { section FlashConfig };
"P2":  place in [from 0x4'0000 to 0x4'03ff] |
                [from 0x4'0410 to 0x7'ffff] { ro };
define block __CODE_ROM { section .textrw_init };
"P3":  place in [from 0x4'0000 to 0x4'03ff] |
                [from 0x4'0410 to 0x7'ffff] { block __CODE_ROM };
define block RW { rw };
"P4":  place in [from 0x1fff'8400 to 0x1fff'ffff] { block RW };
define block __CODE_RAM { section .textrw };
"P5":  place in [from 0x1fff'8400 to 0x1fff'ffff] { block __CODE_RAM };
define block ZI { zi };
"P7":  place in [from 0x2000'0000 to 0x2000'6bff] { block ZI };
define block CSTACK with size = 1K, alignment = 8 { };
"P9":  place in [from 0x2000'6c00 to 0x2000'6fff] { block CSTACK };
do not initialize {
   section .noinit, section .bss, section .data, section __DLIB_PERTHREAD,
   section .customSection };
initialize manually with packing = copy, complex ranges { section .data };

No sections matched the following patterns:

  section .customSection    in block customSectionBlock
  section .textrw           in block __CODE_RAM
  section .textrw_init      in block __CODE_ROM
  section m_interrupts_ram  in "P10"


  Section              Kind         Address    Size  Object
  -------              ----         -------    ----  ------
"A0":                                         0x400
  .intvec              ro code     0x4'0000   0x400  startup_S32K144.o [2]
                                 - 0x4'0400   0x400

"P1":                                          0x10
  FlashConfig          ro code     0x4'0400    0x10  startup_S32K144.o [2]
                                 - 0x4'0410    0x10

"P2-P3", part 1 of 2:                        0x4858
  .text                ro code     0x4'0410  0x1ec2  clock_S32K1xx.o [5]
  .text                ro code     0x4'22d2     0x2  startup_S32K144.o [2]
  .text                ro code     0x4'22d4    0x68  interrupt_manager.o [7]
  .text                ro code     0x4'233c   0xb60  lpuart_driver.o [8]
  .text                ro code     0x4'2e9c   0x2ac  lpuart_hw_access.o [8]
  .text                ro code     0x4'3148    0x62  osif_baremetal.o [12]
  .text                ro code     0x4'31aa     0x2  startup_S32K144.o [2]
  .text                ro code     0x4'31ac   0x49c  edma_driver.o [6]
  .text                ro code     0x4'3648   0x230  edma_hw_access.o [6]
  .text                ro code     0x4'3878   0x500  power_manager_S32K1xx.o [11]
  .text                ro code     0x4'3d78   0x1ae  power_smc_hw_access.o [11]
  .text                ro code     0x4'3f26     0x2  startup_S32K144.o [2]
  .data_init                       0x4'3f28   0x234  <Block>
    Initializer bytes  const       0x4'3f28   0x234  <for .data-1>
  .text                ro code     0x4'415c     0x2  startup_S32K144.o [2]
  .text                ro code     0x4'4160   0x1d4  pins_port_hw_access.o [9]
  .text                ro code     0x4'4334   0x19c  power_manager.o [10]
  .text                ro code     0x4'44d0   0x17c  main.o [13]
  .text                ro code     0x4'464c    0x34  pins_driver.o [9]
  .text                ro code     0x4'4680    0x9c  boot_api.o [13]
  .text                ro code     0x4'471c    0x12  strcmp.o [15]
  .text                ro code     0x4'472e     0x2  startup_S32K144.o [2]
  .text                ro code     0x4'4730    0x60  system_S32K144.o [4]
  .text                ro code     0x4'4790   0x104  startup.o [3]
  .text                ro code     0x4'4894    0xd6  edma_irq.o [6]
  .text                ro code     0x4'496a     0x2  startup_S32K144.o [2]
  .rodata              const       0x4'496c    0xa0  clock_S32K1xx.o [5]
  .text                ro code     0x4'4a0c    0x58  startup_S32K144.o [2]
  .rodata              const       0x4'4a64    0x54  clock_S32K1xx.o [5]
  .rodata              const       0x4'4ab8    0x54  clock_S32K1xx.o [5]
  .rodata              const       0x4'4b0c    0x54  clock_S32K1xx.o [5]
  .rodata              const       0x4'4b60    0x50  clock_S32K1xx.o [5]
  .text                ro code     0x4'4bb0    0x22  fpinit_M.o [14]
  .text                ro code     0x4'4bd2    0x1e  lpuart_irq.o [8]
  .rodata              const       0x4'4bf0    0x14  clock_S32K1xx.o [5]
  .rodata              const       0x4'4c04     0xc  boot_api.o [13]
  .rodata              const       0x4'4c10     0xc  clock_S32K1xx.o [5]
  .rodata              const       0x4'4c1c     0xc  clock_S32K1xx.o [5]
  .rodata              const       0x4'4c28     0xc  clock_S32K1xx.o [5]
  .rodata              const       0x4'4c34     0xc  lpuart1.o [1]
  .rodata              const       0x4'4c40     0xc  lpuart_driver.o [8]
  .rodata              const       0x4'4c4c     0x4  clock_S32K1xx.o [5]
  .rodata              const       0x4'4c50     0x4  edma_driver.o [6]
  .rodata              const       0x4'4c54     0x4  lpuart_driver.o [8]
  .rodata              const       0x4'4c58     0x4  lpuart_driver.o [8]
  .rodata              const       0x4'4c5c     0x4  startup.o [3]
  .text                ro code     0x4'4c60     0x4  startup_S32K144.o [2]
  .text                ro code     0x4'4c64     0x2  startup_S32K144.o [2]
  .text                ro code     0x4'4c66     0x2  startup_S32K144.o [2]
                                 - 0x4'4c68  0x4858

"P2-P3", part 2 of 2:                           0x0
  __CODE_ROM                       0x4'4c68     0x0  <Block>

"P4-P5", part 1 of 2:                         0x234
  RW                            0x1fff'8400   0x234  <Block>
    .data                       0x1fff'8400   0x234  <Block>
      .data-1                   0x1fff'8400   0x232  <Init block>
        .data          inited   0x1fff'8400    0xa0  clock_S32K1xx.o [5]
        .data          inited   0x1fff'84a0    0x30  clockMan1.o [1]
        .data          inited   0x1fff'84d0    0x78  clockMan1.o [1]
        .data          inited   0x1fff'8548     0x4  clockMan1.o [1]
        .data          inited   0x1fff'854c     0xc  lpuart_irq.o [8]
        .data          inited   0x1fff'8558    0x1c  main.o [13]
        .data          inited   0x1fff'8574    0x40  main.o [13]
        .data          inited   0x1fff'85b4    0x78  pin_mux.o [1]
        .data          inited   0x1fff'862c     0x4  pwrMan1.o [1]
        .data          inited   0x1fff'8630     0x2  pwrMan1.o [1]
                              - 0x1fff'8634   0x234

"P4-P5", part 2 of 2:                           0x0
  __CODE_RAM                    0x1fff'8634     0x0  <Block>

"P7":                                         0x4bb
  ZI                            0x2000'0000   0x4bb  <Block>
    .bss                        0x2000'0000   0x4bb  <Block>
      .bss             uninit   0x2000'0000    0x14  boot_api.o [13]
      .bss             uninit   0x2000'0014   0x400  boot_api.o [13]
      .bss             uninit   0x2000'0414    0x10  clock_S32K1xx.o [5]
      .bss             uninit   0x2000'0424     0xc  clock_S32K1xx.o [5]
      .bss             uninit   0x2000'0430     0x4  clock_S32K1xx.o [5]
      .bss             uninit   0x2000'0434     0x4  clock_S32K1xx.o [5]
      .bss             uninit   0x2000'0438     0x4  clockMan1.o [1]
      .bss             uninit   0x2000'043c     0x4  edma_driver.o [6]
      .bss             uninit   0x2000'0440     0x4  interrupt_manager.o [7]
      .bss             uninit   0x2000'0444    0x34  lpuart1.o [1]
      .bss             uninit   0x2000'0478     0xc  lpuart_driver.o [8]
      .bss             uninit   0x2000'0484     0x4  main.o [13]
      .bss             uninit   0x2000'0488     0x4  main.o [13]
      .bss             uninit   0x2000'048c     0x4  main.o [13]
      .bss             uninit   0x2000'0490     0x4  osif_baremetal.o [12]
      .bss             uninit   0x2000'0494    0x10  power_manager_S32K1xx.o [11]
      .bss             uninit   0x2000'04a4     0x8  power_manager_S32K1xx.o [11]
      .bss             uninit   0x2000'04ac     0x4  pwrMan1.o [1]
      .bss             uninit   0x2000'04b0     0x2  boot_api.o [13]
      .bss             uninit   0x2000'04b2     0x2  main.o [13]
      .bss             uninit   0x2000'04b4     0x2  main.o [13]
      .bss             uninit   0x2000'04b6     0x1  boot_api.o [13]
      .bss             uninit   0x2000'04b7     0x1  power_manager_S32K1xx.o [11]
      .bss             uninit   0x2000'04b8     0x1  power_manager_S32K1xx.o [11]
      .bss             uninit   0x2000'04b9     0x1  power_manager_S32K1xx.o [11]
      .bss             uninit   0x2000'04ba     0x1  power_manager_S32K1xx.o [11]
                              - 0x2000'04bb   0x4bb

"P9":                                         0x400
  CSTACK                        0x2000'6c00   0x400  <Block>
    CSTACK             uninit   0x2000'6c00   0x400  <Block tail>
                              - 0x2000'7000   0x400

Unused ranges:

         From           To      Size
         ----           --      ----
     0x4'4c68     0x7'ffff  0x3'b398
  0x1fff'8634  0x1fff'ffff    0x79cc
  0x2000'04bb  0x2000'6bff    0x6745



*******************************************************************************
*** MODULE SUMMARY
***

    Module                   ro code  ro data  rw data
    ------                   -------  -------  -------
command line/config:
    --------------------------------------------------
    Total:

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\Generated_Code: [1]
    clockMan1.o                           172      176
    lpuart1.o                              12       52
    pin_mux.o                             120      120
    pwrMan1.o                               6       10
    --------------------------------------------------
    Total:                                310      358

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\Project_Settings\Startup_Code: [2]
    startup_S32K144.o          1'148
    --------------------------------------------------
    Total:                     1'148

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\devices: [3]
    startup.o                    260        4
    --------------------------------------------------
    Total:                       260        4

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\devices\S32K144\startup: [4]
    system_S32K144.o              96
    --------------------------------------------------
    Total:                        96

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\clock\S32K1xx: [5]
    clock_S32K1xx.o            7'874      712      196
    --------------------------------------------------
    Total:                     7'874      712      196

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\edma: [6]
    edma_driver.o              1'180        4        4
    edma_hw_access.o             560
    edma_irq.o                   214
    --------------------------------------------------
    Total:                     1'954        4        4

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\interrupt: [7]
    interrupt_manager.o          104                 4
    --------------------------------------------------
    Total:                       104                 4

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\lpuart: [8]
    lpuart_driver.o            2'912       20       12
    lpuart_hw_access.o           684
    lpuart_irq.o                  30       12       12
    --------------------------------------------------
    Total:                     3'626       32       24

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\pins: [9]
    pins_driver.o                 52
    pins_port_hw_access.o        468
    --------------------------------------------------
    Total:                       520

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\power: [10]
    power_manager.o              412
    --------------------------------------------------
    Total:                       412

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\power\S32K1xx: [11]
    power_manager_S32K1xx.o    1'280                28
    power_smc_hw_access.o        430
    --------------------------------------------------
    Total:                     1'710                28

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\rtos\osif: [12]
    osif_baremetal.o              98                 4
    --------------------------------------------------
    Total:                        98                 4

C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\Sources: [13]
    boot_api.o                   156       12    1'047
    main.o                       380       92      108
    --------------------------------------------------
    Total:                       536      104    1'155

m7M_tls.a: [14]
    fpinit_M.o                    34
    --------------------------------------------------
    Total:                        34

rt7M_tl.a: [15]
    strcmp.o                      18
    --------------------------------------------------
    Total:                        18

    Gaps                           2
    Linker created                          2    1'024
------------------------------------------------------
    Grand Total:              18'392    1'168    2'797


*******************************************************************************
*** ENTRY LIST
***

Entry                       Address   Size  Type      Object
-----                       -------   ----  ----      ------
.bss$$Base              0x2000'0000          --   Gb  - Linker created -
.bss$$Limit             0x2000'04bb          --   Gb  - Linker created -
.customSection$$Base            0x0          --   Gb  - Linker created -
.customSection_init$$Base
                                0x0          --   Gb  - Linker created -
.customSection_init$$Limit
                                0x0          --   Gb  - Linker created -
.data$$Base             0x1fff'8400          --   Gb  - Linker created -
.data$$Limit            0x1fff'8634          --   Gb  - Linker created -
.data_init$$Base           0x4'3f28          --   Gb  - Linker created -
.data_init$$Limit          0x4'415c          --   Gb  - Linker created -
CLOCK_DRV_GetFreq          0x4'134d   0x48  Code  Gb  clock_S32K1xx.o [5]
CLOCK_DRV_GetSystemClockSource
                           0x4'20c1   0x5c  Code  Gb  clock_S32K1xx.o [5]
CLOCK_DRV_Init             0x4'0b6d   0x46  Code  Gb  clock_S32K1xx.o [5]
CLOCK_DRV_SetSystemClock
                           0x4'1fb9  0x108  Code  Gb  clock_S32K1xx.o [5]
CLOCK_DRV_SetSystemClock::defSysClk
                           0x4'4c28    0xc  Data  Lc  clock_S32K1xx.o [5]
CLOCK_DRV_SetSystemClock::sysClkDivMappings
                           0x4'4bf0   0x14  Data  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_CheckPCCClock
                           0x4'1215   0x56  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_ConfigureFIRC
                           0x4'169f   0xac  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_ConfigureModulesFromScg
                           0x4'19d5  0x180  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_ConfigureModulesFromScg::tmpSysClk
                           0x4'4c1c    0xc  Data  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_ConfigureSIRC
                           0x4'15e9   0xb6  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_ConfigureSOSC
                           0x4'1755  0x10e  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_ConfigureSPLL
                           0x4'1871  0x104  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_ConfigureTemporarySystemClock
                           0x4'1975   0x54  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_ConfigureTemporarySystemClock::tmpSysClk
                           0x4'4c10    0xc  Data  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetCurrentRunMode
                           0x4'142f   0x28  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetDefaultConfiguration
                           0x4'0db9  0x19c  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetDefaultConfiguration::peripheralClockConfig
                        0x1fff'8400   0xa0  Data  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetFircFreq      0x4'1ea1   0x22  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetFircFreq::fircFreq
                           0x4'4c4c    0x4  Data  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetFreq          0x4'22b5   0x12  Code  Gb  clock_S32K1xx.o [5]
CLOCK_SYS_GetLpoFreq       0x4'1f01   0x58  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetPccClockFreq
                           0x4'126b   0xe2  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetPeripheralClock
                           0x4'1395   0x9a  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetScgClkOutFreq
                           0x4'1557   0x42  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetScgClockFreq
                           0x4'0f55  0x110  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSimClkOutFreq
                           0x4'14a1   0xb6  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSimClockFreq
                           0x4'1065  0x1b0  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSimRtcClkFreq
                           0x4'1599   0x4c  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSircFreq      0x4'1e75   0x26  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSrcFreq       0x4'1bd9   0x38  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSysAsyncFreq
                           0x4'1d6d   0xee  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSysClockMode
                           0x4'1f69   0x22  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSysClockSource
                           0x4'1f8b   0x2e  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSysOscFreq
                           0x4'1e5b   0x1a  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSysPllFreq
                           0x4'1ec3   0x3e  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_GetSystemClockFreq
                           0x4'1b55   0x84  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_Init             0x4'212d   0x16  Code  Gb  clock_S32K1xx.o [5]
CLOCK_SYS_SetConfiguration
                           0x4'22c7    0xc  Code  Gb  clock_S32K1xx.o [5]
CLOCK_SYS_SetPccConfiguration
                           0x4'0c41   0x78  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_SetPmcConfiguration
                           0x4'0d97   0x22  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_SetScgConfiguration
                           0x4'0bb3   0x8e  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_SetSimConfiguration
                           0x4'0cb9   0xde  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_SetSystemClockConfig
                           0x4'1c11  0x15c  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_SetSystemClockConfig::maxSysClksInHSRUN
                           0x4'4b0c   0x54  Data  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_SetSystemClockConfig::maxSysClksInRUN
                           0x4'4ab8   0x54  Data  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_SetSystemClockConfig::maxSysClksInVLPR
                           0x4'4a64   0x54  Data  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_TransitionSystemClock
                           0x4'1457   0x4a  Code  Lc  clock_S32K1xx.o [5]
CLOCK_SYS_UpdateConfiguration
                           0x4'214d  0x14a  Code  Gb  clock_S32K1xx.o [5]
CSTACK$$Base            0x2000'6c00          --   Gb  - Linker created -
CSTACK$$Limit           0x2000'7000          --   Gb  - Linker created -
DMA0_IRQHandler            0x4'4899    0xa  Code  Gb  edma_irq.o [6]
DMA10_IRQHandler           0x4'48fd    0xa  Code  Gb  edma_irq.o [6]
DMA11_IRQHandler           0x4'4907    0xa  Code  Gb  edma_irq.o [6]
DMA12_IRQHandler           0x4'4911    0xa  Code  Gb  edma_irq.o [6]
DMA13_IRQHandler           0x4'491b    0xa  Code  Gb  edma_irq.o [6]
DMA14_IRQHandler           0x4'4925    0xa  Code  Gb  edma_irq.o [6]
DMA15_IRQHandler           0x4'492f    0xa  Code  Gb  edma_irq.o [6]
DMA1_IRQHandler            0x4'48a3    0xa  Code  Gb  edma_irq.o [6]
DMA2_IRQHandler            0x4'48ad    0xa  Code  Gb  edma_irq.o [6]
DMA3_IRQHandler            0x4'48b7    0xa  Code  Gb  edma_irq.o [6]
DMA4_IRQHandler            0x4'48c1    0xa  Code  Gb  edma_irq.o [6]
DMA5_IRQHandler            0x4'48cb    0xa  Code  Gb  edma_irq.o [6]
DMA6_IRQHandler            0x4'48d5    0xa  Code  Gb  edma_irq.o [6]
DMA7_IRQHandler            0x4'48df    0xa  Code  Gb  edma_irq.o [6]
DMA8_IRQHandler            0x4'48e9    0xa  Code  Gb  edma_irq.o [6]
DMA9_IRQHandler            0x4'48f3    0xa  Code  Gb  edma_irq.o [6]
DMA_Error_IRQHandler       0x4'4939   0x32  Code  Gb  edma_irq.o [6]
EDMA_ClearDoneStatusFlag
                           0x4'31d1    0x4  Code  Lc  edma_driver.o [6]
EDMA_ClearErrorIntStatusFlag
                           0x4'31cd    0x4  Code  Lc  edma_driver.o [6]
EDMA_ClearIntStatusFlag
                           0x4'31d5    0x4  Code  Lc  edma_driver.o [6]
EDMA_DRV_ClearIntStatus
                           0x4'32bf   0x30  Code  Lc  edma_driver.o [6]
EDMA_DRV_ConfigMultiBlockTransfer
                           0x4'34e1   0x7a  Code  Gb  edma_driver.o [6]
EDMA_DRV_ConfigSingleBlockTransfer
                           0x4'337f  0x162  Code  Gb  edma_driver.o [6]
EDMA_DRV_ErrorIRQHandler
                           0x4'331d   0x62  Code  Gb  edma_driver.o [6]
EDMA_DRV_GetDmaRegBaseAddr
                           0x4'3637    0x8  Code  Gb  edma_driver.o [6]
EDMA_DRV_IRQHandler        0x4'32ef   0x2e  Code  Gb  edma_driver.o [6]
EDMA_DRV_InstallCallback
                           0x4'3299   0x26  Code  Gb  edma_driver.o [6]
EDMA_DRV_SetDestAddr       0x4'35dd   0x2e  Code  Gb  edma_driver.o [6]
EDMA_DRV_SetMajorLoopIterationCount
                           0x4'360b   0x2c  Code  Gb  edma_driver.o [6]
EDMA_DRV_SetSrcAddr        0x4'35af   0x2e  Code  Gb  edma_driver.o [6]
EDMA_DRV_StartChannel      0x4'355b   0x2a  Code  Gb  edma_driver.o [6]
EDMA_DRV_StopChannel       0x4'3585   0x2a  Code  Gb  edma_driver.o [6]
EDMA_GetErrorIntStatusFlag
                           0x4'4895    0x4  Code  Lc  edma_irq.o [6]
EDMA_SetDmaRequestCmd      0x4'3649   0x10  Code  Gb  edma_hw_access.o [6]
EDMA_SetMinorLoopMappingCmd
                           0x4'31ad   0x20  Code  Lc  edma_driver.o [6]
EDMA_TCDClearReg           0x4'3659   0xb6  Code  Gb  edma_hw_access.o [6]
EDMA_TCDSetAttribute       0x4'370f   0x46  Code  Gb  edma_hw_access.o [6]
EDMA_TCDSetDestAddr        0x4'31fd   0x14  Code  Lc  edma_driver.o [6]
EDMA_TCDSetDestOffset      0x4'3211   0x14  Code  Lc  edma_driver.o [6]
EDMA_TCDSetDisableDmaRequestAfterTCDDoneCmd
                           0x4'3225   0x3a  Code  Lc  edma_driver.o [6]
EDMA_TCDSetMajorCompleteIntCmd
                           0x4'325f   0x3a  Code  Lc  edma_driver.o [6]
EDMA_TCDSetMajorCount      0x4'37d5   0xa4  Code  Gb  edma_hw_access.o [6]
EDMA_TCDSetNbytes          0x4'3755   0x80  Code  Gb  edma_hw_access.o [6]
EDMA_TCDSetSrcAddr         0x4'31d9   0x10  Code  Lc  edma_driver.o [6]
EDMA_TCDSetSrcOffset       0x4'31e9   0x14  Code  Lc  edma_driver.o [6]
INT_SYS_DisableIRQGlobal
                           0x4'2325    0xc  Code  Gb  interrupt_manager.o [7]
INT_SYS_EnableIRQ          0x4'22f7   0x16  Code  Gb  interrupt_manager.o [7]
INT_SYS_EnableIRQGlobal
                           0x4'230d   0x18  Code  Gb  interrupt_manager.o [7]
INT_SYS_InstallHandler     0x4'22d5   0x22  Code  Gb  interrupt_manager.o [7]
LPUART0_IrqHandler         0x4'4bd3    0xa  Code  Gb  lpuart_irq.o [8]
LPUART1_IrqHandler         0x4'4bdd    0xa  Code  Gb  lpuart_irq.o [8]
LPUART1_Rx_Callback_IRQHandler
                           0x4'46ab   0x2c  Code  Gb  boot_api.o [13]
LPUART2_IrqHandler         0x4'4be7    0xa  Code  Gb  lpuart_irq.o [8]
LPUART_DRV_Callback_Init
                           0x4'46d7   0x32  Code  Gb  boot_api.o [13]
LPUART_DRV_ClearErrorFlags
                           0x4'2419   0x12  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_CompleteReceiveDataUsingInt
                           0x4'2be1   0x56  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_CompleteSendDataUsingInt
                           0x4'2a2b   0x52  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_ErrIrqHandler
                           0x4'2833  0x124  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_GetData         0x4'2d5d   0x60  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_IRQHandler      0x4'26a3   0x7a  Code  Gb  lpuart_driver.o [8]
LPUART_DRV_Init            0x4'242b   0xf0  Code  Gb  lpuart_driver.o [8]
LPUART_DRV_InstallRxCallback
                           0x4'251b   0x16  Code  Gb  lpuart_driver.o [8]
LPUART_DRV_PutData         0x4'2cf1   0x6c  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_ReceiveData     0x4'256f   0x3e  Code  Gb  lpuart_driver.o [8]
LPUART_DRV_RxDmaCallback
                           0x4'2c4d   0x9e  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_RxIrqHandler
                           0x4'271d   0x66  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_SendData        0x4'2531   0x3e  Code  Gb  lpuart_driver.o [8]
LPUART_DRV_SetBaudRate     0x4'25ad   0xf6  Code  Gb  lpuart_driver.o [8]
LPUART_DRV_StartReceiveDataUsingDma
                           0x4'2b51   0x8c  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_StartReceiveDataUsingInt
                           0x4'2aff   0x4c  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_StartSendDataUsingDma
                           0x4'29a7   0x84  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_StartSendDataUsingInt
                           0x4'2957   0x50  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_StopRxDma       0x4'2e0f   0x5c  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_StopTxDma       0x4'2dbd   0x52  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_TxCompleteIrqHandler
                           0x4'27f9   0x3a  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_TxDmaCallback
                           0x4'2a7d   0x82  Code  Lc  lpuart_driver.o [8]
LPUART_DRV_TxEmptyIrqHandler
                           0x4'2783   0x76  Code  Lc  lpuart_driver.o [8]
LPUART_EnableBothEdgeSamplingCmd
                           0x4'23b7    0xa  Code  Lc  lpuart_driver.o [8]
LPUART_GetIntMode          0x4'304f   0x54  Code  Gb  lpuart_hw_access.o [8]
LPUART_GetStatusFlag       0x4'30a3   0x54  Code  Gb  lpuart_hw_access.o [8]
LPUART_Getchar             0x4'2413    0x6  Code  Lc  lpuart_driver.o [8]
LPUART_Getchar10           0x4'2f8f   0x22  Code  Gb  lpuart_hw_access.o [8]
LPUART_Getchar9            0x4'2f7b   0x14  Code  Gb  lpuart_hw_access.o [8]
LPUART_Init                0x4'2e9d   0x24  Code  Gb  lpuart_hw_access.o [8]
LPUART_Putchar             0x4'240b    0x8  Code  Lc  lpuart_driver.o [8]
LPUART_Putchar10           0x4'2f43   0x38  Code  Gb  lpuart_hw_access.o [8]
LPUART_Putchar9            0x4'2f1d   0x26  Code  Gb  lpuart_hw_access.o [8]
LPUART_SetBaudRateDivisor
                           0x4'2395   0x10  Code  Lc  lpuart_driver.o [8]
LPUART_SetBitCountPerChar
                           0x4'2ec1   0x36  Code  Gb  lpuart_hw_access.o [8]
LPUART_SetErrorInterrupts
                           0x4'30f7   0x38  Code  Gb  lpuart_hw_access.o [8]
LPUART_SetIntMode          0x4'2fb1   0x9e  Code  Gb  lpuart_hw_access.o [8]
LPUART_SetOversamplingRatio
                           0x4'23a5   0x12  Code  Lc  lpuart_driver.o [8]
LPUART_SetParityMode       0x4'2ef7   0x26  Code  Gb  lpuart_hw_access.o [8]
LPUART_SetReceiverCmd      0x4'2369   0x2c  Code  Lc  lpuart_driver.o [8]
LPUART_SetRxDmaCmd         0x4'23ef   0x1c  Code  Lc  lpuart_driver.o [8]
LPUART_SetStopBitCount     0x4'23c1   0x12  Code  Lc  lpuart_driver.o [8]
LPUART_SetTransmitterCmd
                           0x4'233d   0x2c  Code  Lc  lpuart_driver.o [8]
LPUART_SetTxDmaCmd         0x4'23d3   0x1c  Code  Lc  lpuart_driver.o [8]
OSIF_SemaCreate            0x4'3197   0x14  Code  Gb  osif_baremetal.o [12]
OSIF_SemaPost              0x4'3171   0x26  Code  Gb  osif_baremetal.o [12]
PCC_GetClockMode           0x4'0aad   0x22  Code  Lc  clock_S32K1xx.o [5]
PCC_GetClockSourceSel      0x4'0acf   0x14  Code  Lc  clock_S32K1xx.o [5]
PCC_GetDividerSel          0x4'0af7   0x14  Code  Lc  clock_S32K1xx.o [5]
PCC_GetFracValueSel        0x4'0ae3   0x14  Code  Lc  clock_S32K1xx.o [5]
PCC_SetClockMode           0x4'0a5d   0x50  Code  Lc  clock_S32K1xx.o [5]
PCC_SetPeripheralClockControl
                           0x4'0a0f   0x4e  Code  Lc  clock_S32K1xx.o [5]
PINS_DRV_Init              0x4'4651   0x20  Code  Gb  pins_driver.o [9]
PINS_DRV_TogglePins        0x4'4671   0x10  Code  Gb  pins_driver.o [9]
PINS_GPIO_TogglePins       0x4'464d    0x4  Code  Lc  pins_driver.o [9]
PINS_GPIO_WritePin         0x4'4161   0x18  Code  Lc  pins_port_hw_access.o [9]
PINS_GetAdcInterleaveVal
                           0x4'4179   0x7e  Code  Lc  pins_port_hw_access.o [9]
PINS_Init                  0x4'41f7  0x130  Code  Gb  pins_port_hw_access.o [9]
PMC_GetLpoMode             0x4'0b27   0x16  Code  Lc  clock_S32K1xx.o [5]
PMC_SetLpoMode             0x4'0b0b   0x1c  Code  Lc  clock_S32K1xx.o [5]
PMC_SetLpoTrimValue        0x4'0b3d   0x28  Code  Lc  clock_S32K1xx.o [5]
POWER_DRV_DisableVlpClockSrc
                           0x4'3c8f   0x16  Code  Lc  power_manager_S32K1xx.o [11]
POWER_DRV_EnableVlpClockSrc
                           0x4'3c73   0x1c  Code  Lc  power_manager_S32K1xx.o [11]
POWER_DRV_GetEnableClockSrc
                           0x4'3ca5   0x1c  Code  Lc  power_manager_S32K1xx.o [11]
POWER_DRV_SwitchVlprClk
                           0x4'3c29   0x38  Code  Lc  power_manager_S32K1xx.o [11]
POWER_DRV_UpdateInitClk
                           0x4'3c61   0x12  Code  Lc  power_manager_S32K1xx.o [11]
POWER_SYS_CallbacksManagement
                           0x4'4367   0xb6  Code  Lc  power_manager.o [10]
POWER_SYS_DoInit           0x4'3967   0x5e  Code  Gb  power_manager_S32K1xx.o [11]
POWER_SYS_DoSetMode        0x4'39c5   0x1c  Code  Gb  power_manager_S32K1xx.o [11]
POWER_SYS_EnterHsrunMode
                           0x4'3cc1   0x88  Code  Lc  power_manager_S32K1xx.o [11]
POWER_SYS_GetCurrentMode
                           0x4'39e1   0x28  Code  Gb  power_manager_S32K1xx.o [11]
POWER_SYS_Init             0x4'4335   0x32  Code  Gb  power_manager.o [10]
POWER_SYS_SetMode          0x4'441d   0xb0  Code  Gb  power_manager.o [10]
POWER_SYS_SwitchToRunningPowerMode
                           0x4'3a09  0x11a  Code  Lc  power_manager_S32K1xx.o [11]
POWER_SYS_SwitchToSleepingPowerMode
                           0x4'3b23  0x106  Code  Lc  power_manager_S32K1xx.o [11]
RW$$Base                0x1fff'8400          --   Gb  - Linker created -
RW$$Limit               0x1fff'8634          --   Gb  - Linker created -
Reset_Handler              0x4'4a0d         Code  Wk  startup_S32K144.o [2]
SCG_ClearFircControl       0x4'085b    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_ClearFircLock          0x4'084d    0xe  Code  Lc  clock_S32K1xx.o [5]
SCG_ClearSircControl       0x4'07bd    0x8  Code  Lc  clock_S32K1xx.o [5]
SCG_ClearSircLock          0x4'07af    0xe  Code  Lc  clock_S32K1xx.o [5]
SCG_ClearSoscControl       0x4'08db    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_ClearSoscLock          0x4'08cd    0xe  Code  Lc  clock_S32K1xx.o [5]
SCG_ClearSpllControl       0x4'0997    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_ClearSpllLock          0x4'0989    0xe  Code  Lc  clock_S32K1xx.o [5]
SCG_GetClockoutSourceSel
                           0x4'062f    0x8  Code  Lc  clock_S32K1xx.o [5]
SCG_GetCurrentBusClockDividerRatio
                           0x4'0647    0x8  Code  Lc  clock_S32K1xx.o [5]
SCG_GetCurrentCoreClockDividerRatio
                           0x4'063f    0x8  Code  Lc  clock_S32K1xx.o [5]
SCG_GetCurrentSlowClockDividerRatio
                           0x4'064f    0x8  Code  Lc  clock_S32K1xx.o [5]
SCG_GetCurrentSystemClockSource
                           0x4'0637    0x8  Code  Lc  clock_S32K1xx.o [5]
SCG_GetEnableFIRC          0x4'391b   0x18  Code  Lc  power_manager_S32K1xx.o [11]
SCG_GetEnableSOSC          0x4'394f   0x18  Code  Lc  power_manager_S32K1xx.o [11]
SCG_GetEnableSPLL          0x4'38cf   0x18  Code  Lc  power_manager_S32K1xx.o [11]
SCG_GetFircFirstAsyncDivider
                           0x4'06c9    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetFircRange           0x4'0843    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetFircSecondAsyncDivider
                           0x4'06d3    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetFircStatus          0x4'0837    0xc  Code  Lc  clock_S32K1xx.o [5]
SCG_GetFircSystemClockMode
                           0x4'0821   0x16  Code  Lc  clock_S32K1xx.o [5]
SCG_GetHsrunSelectSPLL     0x4'38e7   0x18  Code  Lc  power_manager_S32K1xx.o [11]
SCG_GetSircFirstAsyncDivider
                           0x4'06f3    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSircRange           0x4'07a5    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSircSecondAsyncDivider
                           0x4'06fd    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSircStatus          0x4'0799    0xc  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSircSystemClockMode
                           0x4'0783   0x16  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSoscFirstAsyncDivider
                           0x4'071d    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSoscSecondAsyncDivider
                           0x4'0727    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSoscStatus          0x4'08c1    0xc  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSoscSystemClockMode
                           0x4'08ab   0x16  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSpllFirstAsyncDivider
                           0x4'0747    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSpllMultiplier      0x4'097f    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSpllPredivider      0x4'0975    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSpllSecondAsyncDivider
                           0x4'0751    0xa  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSpllStatus          0x4'0969    0xc  Code  Lc  clock_S32K1xx.o [5]
SCG_GetSpllSystemClockMode
                           0x4'0953   0x16  Code  Lc  clock_S32K1xx.o [5]
SCG_SetClockoutSourceSel
                           0x4'0771   0x12  Code  Lc  clock_S32K1xx.o [5]
SCG_SetEnableFIRC          0x4'38ff   0x1c  Code  Lc  power_manager_S32K1xx.o [11]
SCG_SetEnableSOSC          0x4'3933   0x1c  Code  Lc  power_manager_S32K1xx.o [11]
SCG_SetEnableSPLL          0x4'38b3   0x1c  Code  Lc  power_manager_S32K1xx.o [11]
SCG_SetFircAsyncConfig     0x4'06dd   0x16  Code  Lc  clock_S32K1xx.o [5]
SCG_SetFircConfiguration
                           0x4'0865    0xe  Code  Lc  clock_S32K1xx.o [5]
SCG_SetFircControl         0x4'0873   0x38  Code  Lc  clock_S32K1xx.o [5]
SCG_SetHsrunClockControl
                           0x4'06a3   0x26  Code  Lc  clock_S32K1xx.o [5]
SCG_SetRunClockControl     0x4'0657   0x26  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSircAsyncConfig     0x4'0707   0x16  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSircConfiguration
                           0x4'07c5    0xe  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSircControl         0x4'07d3   0x4e  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSoscAsyncConfig     0x4'0731   0x16  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSoscConfiguration
                           0x4'08e5   0x20  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSoscControl         0x4'0905   0x4e  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSpllAsyncConfig     0x4'075b   0x16  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSpllConfiguration
                           0x4'09a1   0x20  Code  Lc  clock_S32K1xx.o [5]
SCG_SetSpllControl         0x4'09c1   0x4e  Code  Lc  clock_S32K1xx.o [5]
SCG_SetVlprClockControl
                           0x4'067d   0x26  Code  Lc  clock_S32K1xx.o [5]
SIM_ClearTraceClockConfig
                           0x4'05fd    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_GetClockoutDividerValue
                           0x4'05a7    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_GetClockoutSelectorValue
                           0x4'05af    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_GetClockoutStatus      0x4'059d    0xa  Code  Lc  clock_S32K1xx.o [5]
SIM_GetDmaClockGate        0x4'04eb   0x14  Code  Lc  clock_S32K1xx.o [5]
SIM_GetEimClockGate        0x4'0483   0x14  Code  Lc  clock_S32K1xx.o [5]
SIM_GetErmClockGate        0x4'04b7   0x14  Code  Lc  clock_S32K1xx.o [5]
SIM_GetFtm0ExternalClkPinMode
                           0x4'0565    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_GetFtm1ExternalClkPinMode
                           0x4'056d    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_GetFtm2ExternalClkPinMode
                           0x4'0575    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_GetFtm3ExternalClkPinMode
                           0x4'057d    0x6  Code  Lc  clock_S32K1xx.o [5]
SIM_GetLpo1KStatus         0x4'058d    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_GetLpo32KStatus        0x4'0583    0xa  Code  Lc  clock_S32K1xx.o [5]
SIM_GetLpoClkSelectorValue
                           0x4'0595    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_GetMpuClockGate        0x4'051f   0x14  Code  Lc  clock_S32K1xx.o [5]
SIM_GetMscmClockGate       0x4'0551   0x14  Code  Lc  clock_S32K1xx.o [5]
SIM_GetRtcClkSrc           0x4'0411    0x8  Code  Lc  clock_S32K1xx.o [5]
SIM_SetClockout            0x4'05b7   0x34  Code  Lc  clock_S32K1xx.o [5]
SIM_SetDmaClockGate        0x4'04cb   0x20  Code  Lc  clock_S32K1xx.o [5]
SIM_SetEimClockGate        0x4'0463   0x20  Code  Lc  clock_S32K1xx.o [5]
SIM_SetErmClockGate        0x4'0497   0x20  Code  Lc  clock_S32K1xx.o [5]
SIM_SetLpoClocks           0x4'0419   0x4a  Code  Lc  clock_S32K1xx.o [5]
SIM_SetMpuClockGate        0x4'04ff   0x20  Code  Lc  clock_S32K1xx.o [5]
SIM_SetMscmClockGate       0x4'0533   0x1e  Code  Lc  clock_S32K1xx.o [5]
SIM_SetTraceClockConfig
                           0x4'0605   0x2a  Code  Lc  clock_S32K1xx.o [5]
SIM_SetTraceClockSource
                           0x4'05eb   0x12  Code  Lc  clock_S32K1xx.o [5]
SMC_GetCurrentRunningMode
                           0x4'0b65    0x8  Code  Lc  clock_S32K1xx.o [5]
SMC_GetPowerModeStatus     0x4'3879   0x3a  Code  Lc  power_manager_S32K1xx.o [11]
SMC_GetPowerModeStatus     0x4'3db9   0x3a  Code  Lc  power_smc_hw_access.o [11]
SMC_SetPowerMode           0x4'3df5   0xca  Code  Gb  power_smc_hw_access.o [11]
SMC_SetProtectionMode      0x4'3ec5   0x1a  Code  Gb  power_smc_hw_access.o [11]
SMC_SetRunModeControl      0x4'3d79   0x16  Code  Lc  power_smc_hw_access.o [11]
SMC_SetStopModeControl     0x4'3d8f   0x14  Code  Lc  power_smc_hw_access.o [11]
SMC_SetStopOption          0x4'3da3   0x16  Code  Lc  power_smc_hw_access.o [11]
SMC_WaitForStatChange      0x4'3edf   0x48  Code  Lc  power_smc_hw_access.o [11]
SysTick_Handler            0x4'3153    0x8  Code  Gb  osif_baremetal.o [12]
SystemInit                 0x4'4731   0x2e  Code  Gb  system_S32K144.o [4]
SystemSoftwareReset        0x4'475f   0x12  Code  Gb  system_S32K144.o [4]
UART1_Callback_Data     0x2000'0000   0x14  Data  Gb  boot_api.o [13]
UART1_Rx_Buf            0x2000'04b6    0x1  Data  Gb  boot_api.o [13]
UART1_User_Rx_Buf       0x2000'0014  0x400  Data  Gb  boot_api.o [13]
UART1_User_Rx_In        0x2000'04b0    0x2  Data  Gb  boot_api.o [13]
ZI$$Base                0x2000'0000          --   Gb  - Linker created -
ZI$$Limit               0x2000'04bb          --   Gb  - Linker created -
__CODE_RAM$$Base        0x1fff'8634          --   Gb  - Linker created -
__CODE_RAM$$Limit       0x1fff'8634          --   Gb  - Linker created -
__CODE_ROM$$Base           0x4'4c68          --   Gb  - Linker created -
__CODE_ROM$$Limit          0x4'4c68          --   Gb  - Linker created -
__RAM_END {Abs}         0x2000'6fff         Data  Gb  <internal module>
__RAM_START {Abs}       0x1fff'8000         Data  Gb  <internal module>
__RAM_VECTOR_TABLE_SIZE {Abs}
                              0x400         Data  Gb  <internal module>
__VECTOR_RAM {Abs}      0x1fff'8000         Data  Gb  <internal module>
__VECTOR_TABLE {Abs}       0x4'0000         Data  Gb  <internal module>
__Vectors                  0x4'0000          --   Gb  startup_S32K144.o [2]
__Vectors_End              0x4'0400         Data  Gb  startup_S32K144.o [2]
__Vectors_Size {Abs}          0x400          --   Gb  startup_S32K144.o [2]
__iar_init_vfp             0x4'4bb1         Code  Gb  fpinit_M.o [14]
__vector_table             0x4'0000         Data  Gb  startup_S32K144.o [2]
__vector_table_0x1c        0x4'001c         Data  Gb  startup_S32K144.o [2]
boot_api                   0x4'4c04    0xc  Data  Gb  boot_api.o [13]
buf                     0x1fff'8574   0x40  Data  Gb  main.o [13]
buf_tx                  0x1fff'8558   0x1c  Data  Gb  main.o [13]
changeClkVlp            0x2000'04b7    0x1  Data  Lc  power_manager_S32K1xx.o [11]
clockMan1_InitConfig0   0x1fff'84d0   0x78  Data  Gb  clockMan1.o [1]
clockNameMappings          0x4'496c   0xa0  Data  Gb  clock_S32K1xx.o [5]
counter1                0x2000'0488    0x4  Data  Gb  main.o [13]
counter2                0x2000'048c    0x4  Data  Gb  main.o [13]
crc16                      0x4'44d1   0x46  Code  Gb  main.o [13]
enableFIRC              0x2000'04b9    0x1  Data  Lc  power_manager_S32K1xx.o [11]
enableSOSC              0x2000'04ba    0x1  Data  Lc  power_manager_S32K1xx.o [11]
enableSPLL              0x2000'04b8    0x1  Data  Lc  power_manager_S32K1xx.o [11]
exit_code               0x2000'0484    0x4  Data  Gb  main.o [13]
gPowerManagerState      0x2000'0494   0x10  Data  Gb  power_manager_S32K1xx.o [11]
g_RtcClkInFreq          0x2000'0430    0x4  Data  Gb  clock_S32K1xx.o [5]
g_TClkFreq              0x2000'0424    0xc  Data  Gb  clock_S32K1xx.o [5]
g_clockManCallbacksArr  0x2000'0438    0x4  Data  Gb  clockMan1.o [1]
g_clockManConfigsArr    0x1fff'8548    0x4  Data  Gb  clockMan1.o [1]
g_clockState            0x2000'0414   0x10  Data  Lc  clock_S32K1xx.o [5]
g_interruptDisableCount
                        0x2000'0440    0x4  Data  Lc  interrupt_manager.o [7]
g_lpuartIsr             0x1fff'854c    0xc  Data  Gb  lpuart_irq.o [8]
g_pin_mux_InitConfigArr
                        0x1fff'85b4   0x78  Data  Gb  pin_mux.o [1]
g_xtal0ClkFreq          0x2000'0434    0x4  Data  Gb  clock_S32K1xx.o [5]
init_data_bss              0x4'4791  0x104  Code  Gb  startup.o [3]
lpuart1_InitConfig0        0x4'4c34    0xc  Data  Gb  lpuart1.o [1]
lpuart1_State           0x2000'0444   0x34  Data  Gb  lpuart1.o [1]
main                       0x4'4517   0xea  Code  Gb  main.o [13]
osif_DisableIrqGlobal      0x4'3161    0x8  Code  Lc  osif_baremetal.o [12]
osif_EnableIrqGlobal       0x4'3169    0x8  Code  Lc  osif_baremetal.o [12]
osif_Tick                  0x4'3149    0xa  Code  Lc  osif_baremetal.o [12]
peripheralClockConfig0  0x1fff'84a0   0x30  Data  Gb  clockMan1.o [1]
peripheralFeaturesList     0x4'4b60   0x50  Data  Gb  clock_S32K1xx.o [5]
powerConfigsArr         0x1fff'862c    0x4  Data  Gb  pwrMan1.o [1]
powerStaticCallbacksConfigsArr
                        0x2000'04ac    0x4  Data  Gb  pwrMan1.o [1]
pwrMan1_InitConfig0     0x1fff'8630    0x2  Data  Gb  pwrMan1.o [1]
res_api                 0x2000'04b4    0x2  Data  Gb  main.o [13]
result                  0x2000'04b2    0x2  Data  Gb  main.o [13]
s_edmaBase                 0x4'4c50    0x4  Data  Lc  edma_driver.o [6]
s_lpuartBase               0x4'4c40    0xc  Data  Lc  lpuart_driver.o [8]
s_lpuartClkNames           0x4'4c58    0x4  Data  Lc  lpuart_driver.o [8]
s_lpuartRxTxIrqId          0x4'4c54    0x4  Data  Lc  lpuart_driver.o [8]
s_lpuartStatePtr        0x2000'0478    0xc  Data  Lc  lpuart_driver.o [8]
s_osif_tick_cnt         0x2000'0490    0x4  Data  Lc  osif_baremetal.o [12]
s_vectors                  0x4'4c5c    0x4  Data  Lc  startup.o [3]
s_virtEdmaState         0x2000'043c    0x4  Data  Lc  edma_driver.o [6]
strcmp                     0x4'471d         Code  Gb  strcmp.o [15]
sum_add                    0x4'4681   0x14  Code  Gb  boot_api.o [13]
sysClkConfig            0x2000'04a4    0x8  Data  Lc  power_manager_S32K1xx.o [11]
ymodem_crc16               0x4'4695   0x16  Code  Gb  boot_api.o [13]


[1] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\Generated_Code
[2] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\Project_Settings\Startup_Code
[3] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\devices
[4] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\devices\S32K144\startup
[5] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\clock\S32K1xx
[6] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\edma
[7] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\interrupt
[8] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\lpuart
[9] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\pins
[10] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\power
[11] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\platform\drivers\src\power\S32K1xx
[12] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\SDK\rtos\osif
[13] = C:\Users\wjandcf\workspaceS32DS.ARM.2018.R1\Example_S32K_GPIO_IAR\Debug\Sources
[14] = m7M_tls.a
[15] = rt7M_tl.a

  18'392 bytes of readonly  code memory
   1'168 bytes of readonly  data memory
   2'797 bytes of readwrite data memory

Errors: none
Warnings: none
